joranalogue/select-2

Select 2

Joranalogue Audio Design

Dual gated precision control voltage processor. Two voltage processors in 6 HP allowing input selection, voltage hold, and gated polariser/attenuverter functions, operating from slow CVs up to audio frequencies.840

Capabilities 4

Attenuverterattenuverter
Gated polariser knob per processor; can be switched to unity gain via Unity gate input.840
CV Processorcv-processor
Two independent precision gated CV processors with input selection, hold, and polariser. Operates from DC to audio frequencies.840
Sample and Holdsample-and-hold
Hold circuit with very low droop: can store a pitch-accurate voltage for several minutes.840
Voltage Mixervoltage-mixer
When A output is left unpatched, it is normalled into the B output, enabling offset and mixing applications.840

Jacks 12 (10 in / 2 out)

NameSignalVoltageDescription
Inputs (10)
CH1 HoldgateHold gate input for processor A. A high gate freezes the input voltage; changes on signal inputs are ignored until gate goes low.840
CH1 SelectgateSelect gate input for processor A. Low/unpatched selects left signal input; high selects right signal input.840
CH1 Signal In LmixedLeft signal input for processor A, used by default. Normalised to precision +5 V reference when unpatched.840
CH1 Signal In RmixedRight signal input for processor A. Normalised to 0 V when unpatched. Selected when SELECT gate is high.840
CH1 UnitygateUnity gate input for processor A. When high, disables the polariser knob and forces unity gain output.840
CH2 HoldgateHold gate input for processor B. A high gate freezes the input voltage; changes on signal inputs are ignored until gate goes low.840
CH2 SelectgateSelect gate input for processor B. Low/unpatched selects left signal input; high selects right signal input.840
CH2 Signal In LmixedLeft signal input for processor B, used by default. Normalised to precision +5 V reference when unpatched.840
CH2 Signal In RmixedRight signal input for processor B. Normalised to 0 V when unpatched. Selected when SELECT gate is high.840
CH2 UnitygateUnity gate input for processor B. When high, disables the polariser knob and forces unity gain output.840
Outputs (2)
CH1 OutmixedProcessor A output (A output). If left unpatched, its signal is mixed into the B output.840
CH2 OutmixedProcessor B output. Receives mixed signal from processor A when A output is unpatched.840

Parameters 2

NameTypeRangeBehavior
CH1 Polariserknob-1gain – 1gainAttenuverter/polariser knob. Minimum = inverted (gain -1), centre = fully attenuated (0 V), maximum = unity gain (+1). Can be bypassed (forced to unity) by the Unity gate input.840
Zones
Inverted
Attenuated
Unity
  • Inverted -100–-100%At minimum setting, signal is inverted (gain = -1).840
  • Attenuated 0–0%At centre position, signal is fully attenuated (0 V output).840
  • Unity 100–100%At maximum setting, signal is at unity gain (+1).840
CH2 Polariserknob-1gain – 1gainAttenuverter/polariser knob. Minimum = inverted (gain -1), centre = fully attenuated (0 V), maximum = unity gain (+1). Can be bypassed (forced to unity) by the Unity gate input.840
Zones
Inverted
Attenuated
Unity
  • Inverted -100–-100%At minimum setting, signal is inverted (gain = -1).840
  • Attenuated 0–0%At centre position, signal is fully attenuated (0 V output).840
  • Unity 100–100%At maximum setting, signal is at unity gain (+1).840

Firmware history 2 versions

VersionReleasedNotes
rev-ENo functional changes.840
rev-DInitial release.840

References 2

  1. [840]
    Joranalogue Select 2 Manualmanual
    verified 2026-05-23
  2. [841]
    Joranalogue Select 2 product pageproduct_page
    verified 2026-05-23