instruo/ceis2
cèis[2]
A fully analogue voltage-controlled ADSR envelope generator with per-segment gate outputs, CV control over all four stages, retriggerable attack, hold mode for slew limiting, and variable linear-to-exponential envelope shape.902
Capabilities 2
Jacks 12 (6 in / 6 out)
| Name | Signal | Voltage | Description |
|---|---|---|---|
| Inputs (6) | |||
| Attack CV Input | cv | — | Bipolar CV input summed with the Attack slider to modulate attack time; with negative CV the minimum time reduces to approximately 0.8 ms.902 |
| Decay CV Input | cv | — | Bipolar CV input summed with the Decay slider to modulate decay time; with negative CV the minimum time reduces to approximately 0.8 ms.902 |
| Gate/Trig Input | gate | — | Accepts gate or trigger signals to initiate envelope generation; behavior depends on the Gate/Trig Toggle mode setting.902 |
| Release CV Input | cv | — | Bipolar CV input summed with the Release slider to modulate release time.902 |
| Retrigger Input | trigger | — | Retriggers the attack stage from the envelope's current position without waiting for a new gate signal.902 |
| Sustain CV Input | cv | -10V to 10V | Bipolar CV input summed with the Sustain slider; in Hold Mode it becomes a signal input whose level is slewed by the attack and decay parameters.902 |
| Outputs (6) | |||
| Attack Gate Output | gate | ≤10V | Outputs a 10 V gate signal held high for the entire duration of the attack stage.902 |
| CV Output | cv | 0V to 10V | Bipolar CV output carrying the envelope signal (0–10 V during envelope generation) or slewed throughput voltage (−10 to +10 V in CV-through mode).902 |
| Combined Trigger Output | trigger | ≤10V | Fires a 10 V trigger pulse at the start of each envelope stage transition.902 |
| Decay Gate Output | gate | ≤10V | Outputs a 10 V gate signal held high for the entire duration of the decay stage.902 |
| Release Gate Output | gate | ≤10V | Outputs a 10 V gate signal held high for the entire duration of the release stage.902 |
| Sustain Gate Output | gate | ≤10V | Outputs a 10 V gate signal held high for the entire duration of the sustain stage.902 |
Parameters 7
| Name | Type | Range | Behavior |
|---|---|---|---|
| Attack Slider | fader | 0.003s – 10s | Sets the attack stage duration; moving upward increases attack time. With negative CV at the Attack CV Input, the minimum time can be reduced to approximately 0.8 ms.902 |
| Decay Slider | fader | 0.003s – 12s | Sets the decay stage duration — the time to fall from peak to sustain level. Moving upward increases duration; with negative CV the minimum reduces to approximately 0.8 ms. In Hold Mode, defines slew time for descending voltages.902 |
| Gate/Trig Button | button | — | Manually triggers the envelope when pressed; the LED illuminates proportionally to the output CV amplitude, providing visual feedback of envelope level.902 |
| Gate/Trig Toggle | switch | — | Three-position toggle selecting Gate Mode, Trig Mode, or Hold Mode, which determines how the module responds to incoming gate and trigger signals.902 |
| Release Slider | fader | 0.003s – 12s | Sets the release stage duration — the time for the envelope to decay from the sustain level to 0 V after the gate signal drops low.902 |
| Shape Knob | knob | — | Smoothly morphs envelope contour from fully linear (fully anticlockwise) to logarithmic attack with exponential decay and release (fully clockwise), as in classic East Coast ADSR circuits.902 |
| Sustain Slider | fader | 0V – 10V | Sets the sustained voltage level held after the decay stage completes. In Hold Mode, adds a positive DC offset to the slewed input signal.902 |
Firmware history 0 versions
No firmware history recorded.
References 2
- [902]
- [903]